UBUNTU SUMMIT SpacemiT is demonstrating its impressive new K3 RISC-V SoC, a fairly hefty 16-core device – with a moderately ...

NextSilicon, a leader in next-generation computing solutions for AI and high-performance computing (HPC), today announced plans to productize its Arbel RISC-V core into a 64-core and a 128-core, ...

Semiconductor fabric intellectual property company Baya Systems Inc. today announced that European chip and artificial ...

Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. SiFive just announced an array of new additions to its ...

From the Institute of Computing Technology division of the Chinese Academy of Sciences and Peng Cheng Laboratory comes a high-performance and well-documented RISC-V core called XiangShan. In the Git ...

It’s an exciting time in the world of microprocessors, as the long-held promise of devices with open-source RISC-V cores is coming to fruition. Finally we might be about to see open-source from the ...

The ability to effectively combine compute, AI, and graphics will become a key differentiator for platform competitiveness.

RISC-V, the open-standard Instruction Set Architecture (ISA) conceived by UC Berkeley developers in 2010, is going from strength to strength. The RISC in RISC-V stands for Reduced Instruction Set ...

In a world where technology is constantly evolving, a recent experiment sought to explore the potential of RISC-V hardware in everyday computing activities. RISC-V, a free and open instruction set ...

Closed systems stagnate innovation—Linux users know this. Licenses, royalties, and fees keep the well-funded in control. RISC-V throws that out the window because it's free to adopt, adapt, and ...

Google has announced that it will support the RISC-V architecture. This is an alternative computing architecture to Arm, which powers virtually all smartphones. Android only supports two computing ...